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kshlok

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A member registered Jul 10, 2023 · View creator page →

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Nice!

Hi, can you share the source code? that would be very much appreciated

JUST WATCH SEBASTIAN'S VIDEOS ON YOUTUBE

you need to make it falling edge then

(logic-mindful on github)

For memory, i dont think a truth table can exist

AJAX (youtube: ajax123z) has a full tutorial on making an 8-bit CPU in Digital Logic Sim

no, sorry

Nice!

GO HERE TO DOWNLOAD THE COMMUNITY MODDED VERSION

nice

bump

https://github.com/logic-mindful/Digital-Logic-Sim-Community-Edit/tree/main

Logic-mindful gave out a mod

I know its somewhere in AppData/LocalLow but have no other idea

Or when?

Will it be released for mac?

(1 edit)

Suggestions: 

for the 7-segment display, it would be nice if you add in a sign like v1. (Decimal point will also be helpful)

Maybe add in a 14-seg display with sign and decimal

In the chip customization feature, please add option for text to clear up things when using the chip.

Add 16-bit i/o and merge/split and bus since more and more people are building bigger chips. an idea Ive had is to automatically create chips for whatever n-bit i/o/merge/split/bus we can request in the app?

Add tabs so that users can switch between unsaved work.

Export it to the web ?? 

(1 edit)

I got past the randomness, use a multiplexer. the A input would be the output of the mux (it cycles) and the B input would be the data. the select would be the output. I tested it in Sebastian's RAM-256x8 and got all 0s.

i fixed it: overwriting the multiplexer into its own chip fixes it

I actually just found out why: the simulation goes step-by-step. When the or gates output goes into the AND gate, the AND gate doesn't know its value and assumes its off. is there a way to fix this?

OK, I have found a bug: whenever I turn off the store signal, the output turns off. I don't know why that is, will check it out.

This approach actually disables the randomization of the output at start! Let me know what you think @Sebastian Lague!

(2 edits)

I created a simple 4-bit random number generator. I use a 4-bit adder cycle through the numbers from 0-15 and use 4 Data Latches and 4 3-state buffers to output the adder when the enable signal is on. This is my first attempt. 


You can use an led to create an 8-segment

Is there clock synchronization?

THIS IS THE STARTER PACK FOR DIGITAL LOGIC SIMULATOR.

If you do not feel like following and copying Sebastian's every move, this is for you.

This pack has all of Sebastians chips in the simulation. (ep 1-5).

LINK:  CLICK ME

INSTRUCTIONS: (MAC)

In Terminal, enter this command:

open /Users/<username>/Library/Application\ Support/com.DefaultCompany.2DProject/Projects


Download the SebLagueTemp folder, unzip and drag it to Projects.

Run Digital Logic Sim, you will see SebLagueTemp as one of your projects. Feel free to edit!

(1 edit)

Suggestions:

for the 7-segment display, it would be nice if you add in a sign like v1. (Decimal point will also be helpful)

In the chip customization feature, please add option for text to clear up things when using the chip.

Put the truth-table-to logic generator (episode 3) somewhere in the simulation, just so that users who want to either optimize or have no idea how to do things can use it.

Add 16-bit i/o and merge/split and bus since more and more people are building bigger chips.

Add tabs so that users can switch between unsaved work (and maybe the truth-table-logic gen)


Otherwise, very nice simulation! I would definitely recommend this.

You might have to use terminal to get there

the good thing about this ram is that it starts empty, unlike normal d-latch-grid or grid of registers.

yes please. How can we make CPU?

export the file on github, then upload it to unity, change it to webgl and upload it to itch

This is a 4-bit version of the thing. Each combination of 4-bit numbers (8-bit) gives you a different address in the ROM, last 4 digits give the answer. As you can see, if the first 8 digits are all 1, the answer is a fraction and is undefined.  


I have the same problem as you(can't upgrade to 8-bit), but maybe a different mind can use this to create an 8-bit version of the thing.

you can copy off sebastian lague's third video visualizing data with 7-segment displays. it just requires 5 min.

Also we can work with what we have and make our own mods (like v1)

refresh is not like the clock signal, keep it on and the changes will take effect

(1 edit)

Does anybody have a dot or rgb display program? If so, can you

1. go to terminal

2. navigate to 

for windows:
C:\Users\[USERNAME]\AppData\LocalLow\com.DefaultCompany.2D\
for mac:
/Users/[USERNAME]/Library/Application\ Support/com.DefaultCompany.2DProject/

3. Go to projects and upload the folder with the name of your display project to google drive

4. make it for anyone with the link and paste that link here

Yeah, this is 4-bit ram but you could use decoders to reduce the amount of input pins

Hi, can you share the logic generator in video 3? I would like to use it for some of my own designs like division.

Thanks to Neemek on GitHub (https://github.com/SebLague/Digital-Logic-Sim/issues/399) for finding the solution.  It is located in /Users/<username>/Library/Application Support/com.DefaultCompany.2DProject/Projects.