Suggestions:
for the 7-segment display, it would be nice if you add in a sign like v1. (Decimal point will also be helpful)
In the chip customization feature, please add option for text to clear up things when using the chip.
Put the truth-table-to logic generator (episode 3) somewhere in the simulation, just so that users who want to either optimize or have no idea how to do things can use it.
Add 16-bit i/o and merge/split and bus since more and more people are building bigger chips.
Add tabs so that users can switch between unsaved work (and maybe the truth-table-logic gen)
Otherwise, very nice simulation! I would definitely recommend this.