Interesting. What do you mean "RS latches that exist as their own component"? Does this mean instancing each latch out into its own chip might solve this issue? I guess it's worth a try.
Not so with an SR Latch (aka: a NAND or NOR style latch) but yes with an RS Latch (a Not-or-and style latch).
Either style will still take an extra tick on one of either the SET or RESET action, but an RS it will always start in a low state.
I see what you mean. However, pulling the latches out into their own chip does seem to have fixed the problem.
so wait what how does that work
I've been trying this for 2 hours nothing seems to work
can you show me an eaxmple
