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Digital Logic Sim

​A minimalistic digital logic simulator · By Sebastian Lague

T flipflops

A topic by MrBluewolf65 created Apr 22, 2025 Views: 325 Replies: 16
Viewing posts 1 to 5

Does anyone know how to make a simple T Flipflop. I just want to make a simple counter. I am using an adder for a counter rn but it's a little glitchy. I tried to make a T flipflop using various methods but it would just oscillate. 

just make a register and invert the value if pulse on clock is active

....... ok i'm dumb. Could you elaborate?

here's an image of what i described

Aaah thank you so much. 

(1 edit)

hmmmm. I'm not sure what I'm doing wrong, it's not stable. It flickers on and then off, doesn't toggle on when i press the button and off when i press it again. 

oh yea, duh, make a delay like me and put it after the sr latch (yea i know it's inefficient but idc)

delay rng

I'll try this as well.

I just need it to take a a trigger input and hold that state till it receives another rising edge at which it will invert it's state. 

a 2-stage JK flipflop with both the J and K inputs tied together to the single T input will do this.

Do you have a screenshot or something

First one has extra inputs for setting and clearing asynchronously, second one is just the essentials.

Aah ok. I'll try this. 

THANK YOU. It's working. Man that was harder than it should have been lol. 

(+2)

I'll throw my implementation in the ring, too. Just a pair of D latches in series, looped back to a mux, much like in the videos, to make a "register". Then tie the inverted output back around to the input, optionally through a reset, and pulsing the clock while "store/enable" is high will toggle the output.

I didn't understand the others solutions but it worked for me with a master slave configuration . (reverse clock)

Got inspiration from https://www.electronics-tutorials.ws/sequential/seq_2.html