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Digital Logic Sim

​A minimalistic digital logic simulator · By Sebastian Lague

PONG! (8-bit computer)

A topic by Zhatt created 12 days ago Views: 177 Replies: 1
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(3 edits)

I have been working on this one for a while now, but I have managed to get fully-featured pong running on my 8-bit computer (ZHT-92).

Check out the video:

The game features:

  • Bouncing ball with sound
  • Two player paddles that stop at the screen edge
  • A separate goal zone for each player
  • Recording scores with 'pips' on the bottom of the screen
  • After a goal the game waits for player input before continuing
  • After three goals, a 'win' screen is displayed with the player's number.

It took me about three or four weeks to build the computer and program pong into it. You can see the my older versions here.

For the best efficiency in Digital Logic Sim, I have used as few logic gates as possible other than the basic NAND gate. Most chips are only one level deep. The JK Flip-Flops must be their own separate chip, or else there are stability issues and the counters get stuck. It is running at about 10,000 steps per second with 2 steps per clock cycle (~5kHz). Each instruction is broken into four micro-instructions, so it is running at about 1200 lines of code per second in the video (although it can be unstable at this speed, and I usually run it at 3 steps per clock.)

Pong completely fills up the program memory at 256 lines of code. 72 of that is just to the draw the 'win' screens. The main loop is about 137 lines.

I'm not sure if I want to get snake running on this next, or start a new project. If you do anything with this system, post it here!

I did some minor simplification and wire management. The biggest change is I removed the clock from the registers making them asynchronous. Their load signal is robust enough for the task and this means less wires and logic. I left the clock on the RAM, but it could probably be easily removed as well for more efficiency. 

I moved the number display to the program memory as it more accurately displays the line of code being processed. As the double-dabble and 7-segment drivers in the display are relatively complex, you can speed up the simulation by removing that component. I left it in for ease of de-bugging code.

The previous code and compiler works for this version, though I did update the micro-instructions B ROM to have the high and low outputs mirrored so either could be hooked up.