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Digital Logic Sim

​A minimalistic digital logic simulator · By Sebastian Lague

Can one still make a pulse-former?

A topic by ThatRobHuman created Apr 13, 2025 Views: 138 Replies: 2
Viewing posts 1 to 2
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In v0 and v1, one could make a pulse former using a trick with a few NOT gates, an XOR, and an SR-Latch. I think this was an emergent "feature" due to the way that the simulation was originally written (there was effectively a gate delay on the NOT gate).

It looks like the rewrite of the simulation made that not a thing anymore, so I'm wondering if there's still a way to make a single-pulse type thing that has a pulse that is faster than the built-in clock?

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this is probably very overcomplicated but it works

(1 edit) (+1)

I hate to ask, but can you post a screenshot that isn't quite as densely wired? I'm having trouble seeing what's connected to what here.

edit: I thought I had it, but this is behaving like an SR Latch, not a pulse former, so either I'm doing something wrong, or I wasn't clear on the desired behaviour.