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so i've been trying to optimize my circuits for size alot, and i decided to try to optimize for speed a bit today and managed to make a much faster xor gate (3 ticks) by using wires with just 0 and 1 power (since the power decreases by 1 per tick)

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i made it with 4 nand gates, each nand gate is 1 tick

these are very interesting!

nvm seems like it takes 4 ticks sometimes for some reason

would be easier to debug if you added a way to step 1 tick at a time

hi again,

this is planned as part of the upcoming signal analysis update where an oscilloscope will be introduced for things like this as well as handling metastability and whatnot.

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i found the problem, i connected the inputs right to the first nand gate and 2nd and 3rd nand gates, and i also connected the 1st nand gate to the 2nd and 3rd nand gate and since a nand gate takes 1 tick those 2 paths take different amount of time