Digital Logic Sim

A minimalistic digital logic simulator · By Sebastian Lague

NEW CUSTOM 8-BIT CPU

A topic by Bendy509 created 52 days ago Views: 271 Replies: 8

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IT IS 0-3 STEPS. IT IS FETCHED AT STEP 0.

I STILL NEED TO MAKE IMPROVEMENT

---------------------------------- ALU_OP ENCODING -----------------------------

ALU_OP2..ALU_OP0 (Micro B bits 12,11,10):

000 : ADD

001 : SUB

010 : AND

011 : OR

100 : XOR

101 : NOT

110 : INC

111 : DEC

Cool! But I have some ideas for improvement:

- External RAM access

-DDR (Double Data Rate) support

IT HAS R0-R7 GENERAL PURPOSE REG AND 5 GRAPHICS REG (X, Y, R, G AND B).
IT CAN HAVE UP TO 128 INST SET.
YOU MUST USE THIS DLS 2 VERSION: Release DLS Community Edit v1.2.1 · firecerne/Digital-Logic-Sim-Community-Edit.

---------------------------------- ALU_OP ENCODING -----------------------------

0000 : ADD 0001 : SUB 0010 : AND 0011 : OR

0100 : XOR 0101 : NOT 0110 : INC 0111 : DEC

1000 : MUL 1001 : DIV 1010 : MOD 1011 : SHL

1100 : SHR 1101 : ROL 1110 : ROR 1111 : NEG

SHL/SHR/ROL/ROR: 0-7

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