A minimalistic digital logic simulator · By Sebastian Lague
Nice, I’m assuming the off one is just 2 not gates and the on one is just one.
Yeah, pretty much. The off one is an or gate (a NAND with another NAND on either input) but I could have just as well used an AND gate (two NANDs in series) and the on one is just one NAND.
this is similar to my logic 0 and 1 outputs