itch.io

correct. it has huge room for optimization. I've even seen people use the dot display as RAM, I could have utilized that because the RAM chip is the main component that heavily affects performance. but I was aiming mostly for a conceptual and intuitive design rather than an optimized one 

lol, i wish

thank you :) it was fun to make with this sim. a few years ago I stumbled upon this https://github.com/hlorenzi/customasm. easy to use for any custom assembly you want. I Incorporated it in yet another SAP implementation I made using C# https://github.com/SamFarah/SAP1-Emulator/tree/SAP2 

I made a simple CPU 

I started following along with Sebastian's videos but then I got carried away and made a working CPU based on Simple As Possible (SAP) CPU architecture.  

Some details about the architecture: 

It only supports the following few instructions :

• NOP = (1 byte) No operation - OpCode = 0x00
• LDA = (2 bytes) Load Reg A (form Memory Address) - OpCode = 0x01
• ADD = (2 bytes) Add Value of memory address to A and stores it in A - OpCode = 0x02
• SUB = (2 bytes) Subtracts Value of memory address to A and stores it in A - OpCode = 0x03
• STA = (2 bytes) Stores Reg A into Memory Address - OpCode = 0x04
• LDI = (2 bytes) Load Reg A immediate value - OpCode = 0x05
• JMP = (2 bytes) JMP to address - OpCode = 0x06
• JC = (2 bytes) Jump if Carry to address - OpCode = 0x07
• JZ = (2 bytes) Jump if Zero (flag) to address - OpCode = 0x08
• OUT = (1 byte) loads whatever in A into the output register (therefore display) - OpCode = 0x0E
• HLT = (1 byte) Halts the program - OpCode = 0x0F

Addressing space is split only between RAM and ROM as follows:

• ROM address space is 0x00 to 0x7F (128bytes)
• RAM address space is 0x80 to 0xFF (128bytes)

the program it's running in the video can be represented as the screenshot below, which is stored in ROM as hex values directly, of course.

Here is the save file if you want it https://drive.google.com/file/d/1R2pp46HE2XlyOyXfhV24VUoxapS8Anuj/view

It should work on version 2.14. you can extract the save file here: %localappdata%\..\LocalLow\SebastianLague\Digital-Logic-Sim\Projects (if you are on windows)

Disclaimers: 

• download and use at your own risk.
• It is not the most stable thing. could be a bug from the simulator itself or something off with the design. but it does take a few reloading the save file to get it to run smoothly and in a stable way. 
• the save file includes some saved chips that are not used in this.  SAP is the one that has the working implementation.

Key binds:

• R = Resets the counters
• S = Synchronizes (rests) all display settings. useful when using multiple display modules in the same chip and you want them to all have the same settings.
• T = Toggle between signed and unsigned 7seg displays
• B = turn on/off blanking on the 7seg displays 

depends on what you are optimizing for. for example using D flip flops uses less "basic" components than a jk flipflop. but in general I meant improvements more than optimization, things like you can add a reset pin and a preset input which would make the counter much more useful. for example as a program counter that supports jumps. 

here is a 2 bit counter... its not the most optimized way but its in theory 2jk fliplops daisy chained.. in this one, i didnt group any elements together, just used the basic original (AND and NOT) also the clock is built in that can be found in the library

of course, we can improve on it, group it up and make it 4 bit

peaking through the 4b counter block you see

Peaking through a JK-FF you see 

inside of an SR latch 

and inside a NOR