And yes N-16-E is abandoned as of now. I had many ideas like N-51 to be middleground of N-86SX (And N-86) and N-16, if you need variants of this CPU i could make it for you to use.
mukhash_x86
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Note: There is a successor to this CPU "N-86SX" which has locks, interrupts, returns, and stack.
I have posted details in popular non-official discord server
You can check different server (NAND)
Anyone who wants to download or work together you could reply here or in discord
My discord username is : "null_0xf4"
Edit: Since it is more complex it will run much slower at around 200~ Hz (400~ steps per second)
If you mean that in DLS then sometimes it the timing issue because more complexity = more delay in DLS, to fix that you make the clock slower (NOT the steps per second, you change clock tick per steps), sometimes the DLS engine just gives up and in parts where its more complex strange stuff happen like Tri-state buffer function as should but sometimes it doesnt let the data through even though it is enabled to let the data through.
Everyone are begging Sebastian Lague to fix this issue, sometimes this bug is seen in older DLS builds where CPUs are more stable but this time it happens more rarely there but in older DLS versions sometimes if the clock gets to fast complex units could get same effects and malfunction.
Digital Logic Sim community · Replied to an gamer. (xcxx) or (the anthoian gamer) in "N-16" Central Processing Unit.
N-16 is a 16-bit CISC CPU that has 8 registers, in this fibonacci programm only 4 registers were used. I can share the files of the project if needed.
WARNING: if you want to download the project then you should know that because of DLS bottlenecking the counters (CU, PC, QUEUE) are not guaranteed to always work, I am searching on how to fix that issue, last time I did make stable counter but it made the whole CPU to halt or to CU miss some T-states.
Digital Logic Sim community · Replied to an gamer. (xcxx) or (the anthoian gamer) in "N-16" Central Processing Unit.
IDK, now it can count 23 fibonacci numbers and extra 24th overflowed one in 5~ seconds before HALTing (It's was programmed to count 24) and the clock speed is 1.8~ Khz (3700~ steps per second), however it is unstable because of counters, I will try to fix it but if the counters load then the CPU runs flawlessly. And the CPU needs 2 words (3 if MOV reg, addr) and overall 4 processes (Fetch, Fetch, Fetch or ignore, Execute). I could share it in other platforms if needed, overall the ROM itself has 15 / 20 words (I dont remember exactly how much) overall with values in other addresses to test MOV reg, addr.
The big jump will be N-86, but its progress has been frozen due to DLS bottlenecking itself and it runs slowly and it is the reason why I can't even test it, there is another project N-16-E to enchant N-16.
My own CPU named "N-16" is finished, due to DLS engine it might fail fibonacci sequence but sometimes it works if there is no lag, it is able to do basic ALU operations with Rotation, Shift, Comparation, Jumps, MOV operation, CPU control operations.
View how N-16 does fibonacci sequence:
P.S. - The video lasts 2 hours due to Screen Recorder. Without the screen recorder the video would have been much faster.
As of now the CPU could run faster but on DLS it has beaten its new record of 35.8~ Hz.
Alright since everybody are talking about it here I will update that it now actually runs at speed of 1.7 Khz, sometimes even faster