Hello,
I'm trying to build CPU but I encountered a problem with registers, due to some factors my SR latches (build from NAND gates) can have some transitional states where 0 or 1 are updated with delay, and instead of going from 0111 to 1000 i have 0111 then for short period 1111 and then 1000. This completely ruins my decoders and operations. Is there any way to eliminate or go around this problem?
