The simulation needs a lot of optimization for sure. For now though, it helps a lot if you can simplify the chips that are used many times over in the ram. For example, if you have a dlatch made using NOR/AND/NOT gates like I show in my video, you could modify it to instead just use 5 NAND gates. Since NAND gates are built-in, its a lot faster for the simulator to process than custom chips like NOR, etc.