Devlogs
UniPCemu build 2018/06/21 10:56 is now live!
UniPCemuA downloadable emulator for Windows and Android
Lots of CPU bugfixes and improvements and some hardware updates and improvements have been added, as well as improved and fixed accuracy issues!
Changes:
- Implemented a phonebook into the modem for easy dialing.
- Added modem quick dial support for software that doesn't support the normal phonebook feature. This supports dialing using a shortened phonenumber(with the phonenumber using the quick dial number) as well at the ATDS phonebook dial command. AT&Z phonebook commands are also supported.
- Improved seperation of internal and instruction stepping.
- Improved x86 IMUL flags.
- Improved 80486 to be able to perform a bus transfer every cycle, as is documented.
- Only one prefetch clock on the 80486+ CPUs.
- Improved 80486 BIU stalls.
- Improved T-state always being T1 on 80486+.
- Seperated 80486 BIU cycle logic from the 80286/80386 version.
- Optimized the active cycle handling.
- Improved opcode A0/A1 16-bit and 32-bit modr/m checks to occur at the right moment.
- Fixed JMP/CALL memory checks to properly occur.
- Fixed 32-bit address opcode A0 memory check to properly occur.
- Fixed 80386+ 0F opcodes to properly use the instruction stepping when required.
- Improved seperation of instruction modr/m step vs internal modr/m step to apply to all CPUs.
- Changed the remaining instruction steps to modr/m steps when required.
- Fixed invalid PUSH instruction step bases.
- Fixed missing modr/m steps in the 80386+ core.
- Increased emulation to allow bigger timeouts.
- Improved timeout to discard any remaining time to process, preventing hanging the emulation loop when encountering too large timeouts, clipping timing properly.
- Improved checks on switching FROM and TO a x86 task.
- Applied normal loading descriptor privilege levels to non-code segment descriptors as well.
- Task switches caused by a normal loading instruction loading a task doesn't push an error code!
- Improved task switch only pushing an error code when valid to push.
- Fixed missing LDTR load during task switch.
- Loading SS in any way updates the CPL accordingly when it succeeds.
- FS and GS are cleared when task switching to an 16-bit TSS.
- Improved privilege requirement for loading the SS register, while ignoring it during privilege changes.
- CPL must match SS DPL when switching stacks.
- Fixed SAVEDESCRIPTOR calls.
- Seperated CPL detection from the CPU mode updating, since they work differently(only when switching modes VS only when changing privilege levels).
- Optimized paging.
- Optimized running with inactive debugger.
- Optimized the sorting of the Paging TLB by age using a new sorting algorithm.
- Don't check faultraised for faults: this is given by the interrupts themselves return 1, 0 or NULL depending on the call.
- Improved segmentWritten result on faults to properly abort the entire stack of operations that are nested.
- Fixed missing SS privilege level update when running in protected mode.
- Improved support for paging faults when loading and saving segment descriptors.
- Implemented support for the segment descriptor access rights Accessed bit to be set when the descriptor is loaded.
- Improved x86 (I)MUL flags to be more accurate.
- Improved Paging TLB.
- Implemented 80386 TR6 and TR7 registers with their TLB functionality.
- Fixed TLB reads to ignore the proper read mask, ignoring the Dirty and Read/Write bits during Paged Reads when reading the TLB.
- Fixed MinGW compiler warnings.
- Added support for the Dirty bit to be updated instead of creating a new entry when writing a TLB entry.
- Improved handling of TLB being a Writable bit instead of the Read/Write operation of the access.
- Fixed Paging TLB and improved comments.
- Fixed POP ES to properly use 32-bit operand size when popping ES.
- Added functionality for the PS/2 keyboard to handle Ctrl/Alt special cases for scancode generation.
- Updated the common emulator framework to the latest commit.
- Implemented bonus keys for the middle block keys and KP/ key on the PS/2 keyboard.
- CTRL-SYSRQ becomes CTRL-SHIFT-SYSRQ.
- Improved XLAT performing access checks for a memory read instead of a memory write.
- The CMOS SRB bit 1 sets 12 hour mode when set, instead of setting 24 hour mode.
- Improved accurate time to epoch time conversion to apply months correctly.
- Improved decoding of midnight.
- Fixed the 24-hour mode bit to actually enable 24-hour mode when set. Otherwise, 12-hour mode is enabled.
- Added support to the 8042 command byte to enable the hardware when written.
- Added a debug breakpoint mode that ignores CS and only matches EIP with the settings(reverse of the older I(gnore EIP) mode) to match an offset within an executing program only.
- Fixed Settings menu representation of Ignore CS to be correct.
- Fixed EIP only breakpoint.
- Far return to lower privilege level pops from both caller's stack and returned stack.
- Prevented double processing of (E)SP when performing a far return to the same privilege level.
- Double percision instead of single percision has been restored, fixing hardware that requires it to work properly(extremely small delays with CD-ROM emulation on the mechanical properties of the CD-ROM being inserted, spin up/down etc.).
- Optimized repeating instructions and prefixes.
- Fixed REP disabling part of it's settings during each instruction cycle.
- Implemented clearing and invalidating segment registers when returning to an outer privilege level.
- Make sure the CMOS is saved/updated when opening the Settings menu. This also prevents the changes CMOS settings from being discarded when the Settings menu changes are discarded.
- Added required locks around the saving of the CMOS settings when loading the Settings menu.Improved CMOS century byte to allow invalid values to be counted as binary values automatically.
- Improved CMOS century byte to allow invalid values to be counted as binary values automatically.
- Improved failing encoding of BCD century to enforce binary format century, if possible.
- Improved binary century calculations when using the binary century format for 19th and 20th century calculations.
- Improved ModrR/M handling of 16/32-bit (SIB) displacements.
- Mapped 8086 opcodes C0/C1 to C2/C3 and C8/C9 to CA/CB as duplicate opcodes.
- Updated Android gradle to 3.1.3.
- Improved ModR/M disassembly and calculation. Scaled index+Displacement are handled as index(if either or both are used, no ESP index), base is either the supplied base(disp32) or a base register(except EBP with MOD=0).
- Optimized the modr/m byte for execution while not debugging.
- Fixed the 32-bit SIB displacement-only mode to actually use the displacement, no displacement when any other MOD=0 case is to be applied.
- Improved debugging information on MOV CS,reg instructions.
- Improved handling of 16-bit offsets when retrieving an offset to read for effective address loads.
- Improved masking on the last used offset of modr/m accesses.
- Fixed some ModR/M memory offset bugs.
- Don't apply added offset to the last calculated offset.
- Don't update the last offset when specifying a register.
- Fixed LEA from register to be an undefined instruction on 80186+ CPUs.
- Fixed incorrect decoding of 32-bit addresses bug.
- Converted the regsize variable of modr/m parameters to base 2.
- Adjusted 80386+ Jcc instructions to match the 8086 disassembly and processing.
- Adjusted x86 Jcc and SETcc instructions to match IBMulator output.
- Made conditional jumps(Jcc) to match ndis disassembly from a raw .COM file containing all those instructions.
- Adjusted the x86 Jcc instruction disassembly to their non-sugar versions.
- Fixed 32-bit conditional jumps to use 32-bit storage properly.
- Fixed debugger masking of (E)IP.
- Fixed clearing of segment registers when returning to a lower privileged level.
- Only (E)SP/(E)BP as a base register defaults to SS. Using EBP as an index defaults to DS instead.
- Fixed delaying of interrupts during 32-bit MOV to a segment register.
- Improved STI to delay interrupts until after the next instruction.
- Implemented the B-bit on top-down descriptors checking.
- Improved 80486+ alignment check exception not to occur when on an older CPU or when the Alignment Mask isn't set.
- Fixed the x86 limit checking to be able to check 17/33-bit limits on a 32-bit chip to check for overflow as well.
- Fixed memory protection to properly be using 31/17-bit offsets for adding overflow.
- Modified all memory checks to wrap first, then check the entire byte/word/dword for the segment limits on a access to the resulting address.
New features(simplified version of the above):
- Phonebook support for the modem emulation has been added.
- Improved timeout to discard any remaining time to process, preventing hanging the emulation loop when encountering too large timeouts, clipping timing properly.
- CPU improvements and more accuracy have been implemented.
- Keyboard scan code generating for Ctrl/Alt combinations with special modifier keys(Num Lock, PrintScn/SysRq, Pause/Break).
- CMOS timekeeping has been improved.
- 8042 command byte now has improved functionality.
- The debugger now implements a O-suffix, which applies the (E)IP filter only(ignoring the segment part of the debugger address).
- CMOS in the settings file is now saved/updated when entering the settings menu, when dirty. This allows the emulator not to discard the loaded CMOS when loading the settings for editing it in the settings menus.
- Updated Android gradle to 3.1.3.