Posted October 05, 2025 by Nythrok Games
Hey again, everyone!
I want to thank everyone who is following the development, I appreciate it a lot.
Before I get into the real devlog stuff, I want to quickly share some information about something, that happened a few days ago. A security vulnerability has been uncovered inside applications built with specific Unity versions. For now there are no signs of any exploitation of this, and Unity acted quickly, and in newer versions there is a patch for this, and for older versions there is an application that can patch this vulnerability per build. I just want to say, that I won't ever share a vulnerable build, any game build I share will have this patched, and this didn't and won't slow down development at all.
Now onto the devlog part.
As the title said, address space has been added to the game. When designing ISAs, you will have to decide how big do you want it to be.
(Its under the "Bits" selector. )
The size of the address space will decide how large the processors memory space can be. Making it larger will make the ISA more complex.
Inside the "Design focus" panel, now there is the I/O mapping. I/O is a crucial part of computers, and CPUs can handle I/O bits in two different ways, memory-mapped and port-mapped. If you select port-mapped you have to decide how large do you want the I/O address space to be.
In the case of memory-mapped, I/O uses bits from the memory address space, so it makes the usable memory smaller. Port-mapped uses separate bits, but this requires separate I/O instructions, so it makes your ISA more complex.
When you make new ISA versions you can change both I/O mapping and address space, so new instructions can use a different mapping and more memory space.
Now we look at the Chip layout designer, where you design the chips layout. It is very early in development, it lacks most features, but it already has what we will look at now. As we have talked about address space, the amount of pins a CPU has are related to it.
There is a left side panel, that will contain overall design choices, for example single voltage or multiple, support chips and more.
The Core and Connection are actually buttons on this layout panel, if we click on them they open the editor panel on the right side.
This is the connection setup, still in development, but the pin setup is already there. You get to decide how many data and address pins do you want on your CPU. How many data pins you have will decide how many data can you CPU move from memory to the registers or from registers to memory at a time. Address pin number decides how large the memory can be. Obviously you can only have as many address pins as the ISA's address space. Making an ISA that can address more memory than the CPU in the end might look like a bad idea, but if you want to make more performant CPUs with the same ISA to ensure compatibilty, it might be a good idea to do that, otherwise its actually is just a waste. Its possible to have multiplexed pins, so your CPU uses the same pins for data and address, this can lower the pin count a lot, which can be important later on, but it also can lower the performance.
As time goes on CPUs become so complex, that such a simple little bus will become a big bottleneck, so a new type of memory interface come to light, the Northbridge.
Even later the logic of the Northbridge was integrated into the CPU itself. These are currently in development, but they aren't as important for now, as I want to make the game work first, at least up to the 1980's, and then add the extra technology.
By clicking the Core part of the designer, you can go into the Core architecture editor, which I already shown in the previous devlog.
This is it for this time, next time I will be back with way more, I can already tell, as I am currently working on some big things.
Have a nice day!