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Sorry for delay in response, I have a lot of work. The changes are very good and useful. As far as I see they are working fine without any problems. I have some new sugestions for UI - first: could you implement more advanced save/load dialog which would allow to select directory to/from save/load?; second: component toolbar on the left. Could it be full vertical but thin? As it is now it take more place - even if components are below or above it covers more space than vertical toolbar, also on vertical toolbar there could be labels and components could be sorted by those labels for eg. logic gates, memory devices, inputs, etc. This would make component toolbar more visible clear. And third thing: maybe text component which would allow to place text note in any place in circuit. It would be useful to place descriptions of some parts/functions. I'm working on my CPU, I'm doing it in LogicWorks but soon I will start to rebuild it in DLS. LogicWorks unfortunatly refuse to cooperate with my CPU. I think that circuit is to big...

Thanks for the suggestions.

> first: could you implement more advanced save/load dialog which would allow to select directory to/from save/load?

Unfortunately, that's harder than it sounds. Implementing a proper save/load dialog using custom UI requires correct handling of Unicode paths and filenames, which in turn requires major changes to the application. This is one of those things I decided early in development and are a bit hard to change at the moment. Don't forget that even if the simulator is capable enough to handle complex circuits, my initial thought was to make some kind of game out of it. So, arbitrary save/load paths didn't fit in such scenario.

Having said that, what I have in my TODO list is the ability to add slashes as separators when saving a schematic, in order to be able to group your circuits into subfolders inside the existing schematics folder. Still needs some work to be implemented properly, but it's a lot less than what's required for what you suggest (i.e. since DLS doesn't allow non-ASCII chars in its input boxes, there's no need to handle Unicode paths).

> second: component toolbar on the left

That sounds nice. And it might be more accessible in case I add more build-in components in the future. I'll think about it.

> And third thing: maybe text component which would allow to place text note in any place in circuit.

I had that in my list, but I cannot find it anymore :) Probably removed it as not-needed. As far as I remember, what I had in mind was something like PDF comment annotations. Small symbols on the schematic grid, which you click to show/edit a comment. Is this what you have in mind? Or you want the text to be visible at all times? Maybe a "pin note" button will allow both ways to be implemented. I'll also think about it.

> LogicWorks unfortunatly refuse to cooperate with my CPU.

I haven't used LogicWorks so I'm not familiar with its capabilities. Looking at its website, it looks way more professional than DLS :)

Do you mean that it cannot simulate your schematic fast enough? Do you have any numbers which you can compare with DLS once you manage to rebuild your circuit in it? E.g. how fast is the simulation in LogicWorks (i.e. circuit nsec per wall-clock sec), like in DLS? Is there such a metric in LogicWorks?

I don't know what kind of circuits you've managed to build with DLS so far, so I'd suggest to not expect much from it performance-wise. The largest circuit I've managed to build was a cycle-accurate i8080 CPU but the simulation performance isn't great (~750usec/sec on my i3-2100).

I had that in my list, but I cannot find it anymore :) Probably removed it as not-needed. As far as I remember, what I had in mind was something like PDF comment annotations. Small symbols on the schematic grid, which you click to show/edit a comment. Is this what you have in mind? Or you want the text to be visible at all times? Maybe a "pin note" button will allow both ways to be implemented. I'll also think about it.

The double function would be good - option to pin note to always show it content or to keep only icon. Some important notes could be pinned and others which are additional could be hidden.

> LogicWorks unfortunatly refuse to cooperate with my CPU.

I haven't used LogicWorks so I'm not familiar with its capabilities. Looking at its website, it looks way more professional than DLS :)

It is not so professional as it looks, it is not updated since long time. It is interesting that it was/is very popular in students courses, almost all universities are using it

Do you mean that it cannot simulate your schematic fast enough? Do you have any numbers which you can compare with DLS once you manage to rebuild your circuit in it? E.g. how fast is the simulation in LogicWorks (i.e. circuit nsec per wall-clock sec), like in DLS? Is there such a metric in LogicWorks?

Well, it is not speed problem at this point. It is extreme laggy and it wont work at all with around half of my CPU. I think that it would be possible to somehow compare speeds. Maybe two identical circuits, CPUs, my first LogicWorks CPU (8-bit) was computing Fibonacci series.

I don't know what kind of circuits you've managed to build with DLS so far, so I'd suggest to not expect much from it performance-wise. The largest circuit I've managed to build was a cycle-accurate i8080 CPU but the simulation performance isn't great (~750usec/sec on my i3-2100).

I must check it on my i7-4790k, currently I'm using it on notebook with i5, but I have access to dual Xeon workstation, it would be funny to check performance on it ;)

PS: new idea - pull-up resistors. Sometimes when you use tri-state buffers you want 0 instead of "Z" (not connected state) https://en.wikipedia.org/wiki/Pull-up_resistor.

> I must check it on my i7-4790k, currently I'm using it on notebook with i5, but I have access to dual Xeon workstation, it would be funny to check performance on it ;)

Unfortunately, the dual Xeons won't make a difference in performance. Currently simulation is single threaded and only 8ms of frame time is devoted to it. Until I manage to move the simulation to a separate thread and it ends up being faster than the single threaded version, 8ms should be enough for smooth interaction with the schematic.

> PS: new idea - pull-up resistors. Sometimes when you use tri-state buffers you want 0 instead of "Z" (not connected state)

Aren't pull-up resistors considered analog devices (i.e. they require a Vcc or Gnd pin to work)? If yes, they don't fit into the current simulator.

Can you describe a situation where a tri-state buffer with a 0 instead of Z output would be required? The only reason there are tri-state buffers in DLS is to be able to support buses (which are effectively wire-OR structures). Is there another usage for them? Isn't it possible to use AND/OR gates in places where you need a tri-state buffer with 0 disconnected state?